Programming Standards for FPGAs in HPC applications Session: BoF-22 Event Type: BOF Time: 12:15pm - 1:15pm Speaker(s): Malachy Devlin, Aussie Schnore Location: 602-604 Abstract: FPGAs are gaining momentum as a technology that can accelerate Moore's Law and provide orders of magnitude greater computational capability with lower power consumption. However the system architectural and programming tools are not as mature as processor orientated technology, however this is accelerating at a comparable rate to performance capability of FPGA devices which have passed processor performance. The questions that need to be addressed are; Can the programming paradigm for FPGAs be harnessed? When will the maturing tool flows for FPGAs be comparable to those available for microprocessors? What standards need to be created to support the cross compatibility of FPGA based applications? Will FPGAs sustain their performance lead over the microprocessor technology? Do FPGAs provide a significant performance increase in real applications to justify a paradigm shift? Chair/Speaker Details: Malachy Devlin Nallatech Aussie Schnore GE